TSMC 5nm Thread

[SteelCrysis]

https://www.techpowerup.com/260575/tsmc-...-than-7-nm

TSMC vice chairman and CEO C.C. Wei announced the company's plans for 5 nm are on track, which means High Volume manufacturing (HVM) on the node is expected to be achieved by 2Q 2020. The company has increased expenditures in ramping up its various nodes from an initially projected $10 billion to something along the lines of $14 billion - 15 billion; the company is really banking on quick uptake and design wins on its most modern process technologies - and the increased demand that follows.

[SteelCrysis]

https://www.tomshardware.com/news/nvidia-5nm-chip

Forget about 7nm; that's so 2019 or perhaps 2020. Nvidia is reportedly planning to use TSMC's new 5nm process node, but not for its next-gen Ampere GPUs. Nvidia and AMD are both ramping up TSMC orders for old and new products alike, enough to significantly boost the Taiwanese supplier's profits and counteract coronavirus-related headwinds, according to new information from Digitimes.

[SteelCrysis]

https://www.techpowerup.com/266969/tsmc-...ne-of-them

TSMC is working hard to bring a new 5 nm (N5 and N5+) despite all the hiccups the company may have had due to the COVID-19 pandemic happening. However, it seems like nothing can stop TSMC, and plenty of companies have already reserved some capacity for their chips. With mass production supposed to start in Q3 of this year, 5 nm node should become one of the major nodes over time for TSMC, with predictions that it will account for 10% of all capacity for 2020. Thanks to the report of ChinaTimes, we have a list of new clients for the TSMC 5 nm node, with some very interesting names like Intel appearing on the list.

Apple and Huawei/HiSilicon will be the biggest customers for the node this year with A14 and Kirin 1000 chips being made for N5 node, with Apple ordering the A15 chips and Huawei readying the Kirin 1100 5G chip for the next generation N5+. From there, AMD will join the 5 nm party for Zen 4 processors and RDNA 3 graphics cards. NVIDIA has also reserved some capacity for its Hopper architecture, which is expected to be a consumer-oriented option, unlike Ampere. And perhaps the most interesting entry to the list is Intel Xe graphics cards. The list shows that Intel might use the N5 process form TSMC so it can ensure the best possible performance for its future cards, in case it has some issues manufacturing its own nodes, just like it did with 10 nm.

[SteelCrysis]

https://www.tomshardware.com/news/tsmc-5...technology

For 5nm, TSMC says it's ramping N5 production in Fab 18, its fourth Gigafab and first 5nm fab. The company certainly isn't wasting any time speeding past its competitors — one year after breaking ground in 2018, TSMC began moving in over 1,300 fab tools, completing that task in just eight months. Fab 18 began volume production of N5 in the second quarter of 2020 and is designed to process approximately one million 12-inch wafers per year.

[SteelCrysis]

https://www.techpowerup.com/271371/marve...n-5nm-tech

Marvell, a leading provider of data infrastructure semiconductor solutions, today announced an extension of their long term partnership with TSMC (TWSE: 2330; NYSE:TSMC), the world's largest dedicated semiconductor foundry, to deliver a comprehensive silicon portfolio for the data infrastructure market leveraging the industry's most advanced 5 nanometer (nm) process technology. Next-generation infrastructure has never been more critical to the global economy. It's what's keeping the world connected, businesses running and information flowing. With this collaboration, Marvell and TSMC are advancing the essential technology underpinning this infrastructure to provide the storage, bandwidth, speed, and intelligence that tomorrow's digital economy demands - with the added customer benefit of significant energy efficiency. Built in partnership with TSMC on the most advanced process technology currently in volume production, Marvell's new 5 nm portfolio will enable leading-edge silicon innovation for the infrastructure market.

[SteelCrysis]

https://www.tomshardware.com/news/tsmcs-...ollar17000

A blogger has published estimates of TSMC’s wafer costs and prices. Quite unsurprisingly, processing of wafers is getting more expensive with each new manufacturing technology as nodes tend to get more capital intensive. TSMC’s latest N5 (5nm) fabrication process appears to be particularly expensive on per-wafer basis because it is new, but its transistor density makes it particularly good for chips with a high transistor count.

RetiredEngineer, a well-known semiconductor blogger, has published a table with a calculation of TSMC’s sale price per hypothetical chip by node in 2020. The source of the table was not mentioned, but it probably comes from a recent report covering foundry business and makers of semiconductors.

The model is based on an imaginary 5nm chip the size of Nvidia's P100 GPU (610 mm2, 90.7 billion transistors at 148.2 MTr/mm2). As far as foundry sale price per patterned 300-mm wafer is concerned, the model takes into account such things as CapEx, energy use, depreciation, assembly, test and packaging costs, foundry operating margins, and some other factors. Meanwhile, the foundry sale price per chip also includes design costs, yet this number varies greatly from company to company and from node to node (i.e., design costs of a 610 mm2 5nm are different for different companies and implementation of a 610 mm2 chip varies from node to node due to different design rules and IP), so it should be taken with a grain of salt.
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There are several factors that make TSMC’s N5 node so expensive to use today. Firstly, TSMC started to produce 5nm chips several months ago and the fab as well as equipment it uses have not depreciated yet. Secondly, N5 heavily relies on usage of extreme ultraviolet lithography and can use it on up to 14 layers. According to ASML, one EUV layer requires one Twinscan NXE step-and-scan system for every ~45,000 wafer starts per month. Each EUV tool is believed to cost about $120 million and these scanners are rather expensive to run, too. Given TSMC’s volumes, it needs loads of such scanners for its N5 technology. Therefore, it will take some time before TSMC depreciates the fab and equipment it uses for N5.

But even at current costs it makes a great sense for makers of highly-complex chips to use TSMC’s leading-edge process because of its high transistor density as well as performance. Based on the numbers provided, it costs $238 to make a 610mm2 chip using N5 and $233 to produce the same chip using N7. At 16/12nm node the same processor will be considerably larger and will cost $331 to manufacture. At N5, the chip will not only be relatively small (at 610mm2 to be more precise), but it will also run 15% faster at a given power or consume 30% less power at a given frequency when compared to N7.

One thing to keep in mind with such a comparison between nodes is that while it is based on data from TSMC as well as the semiconductor industry in general, the actual numbers have never been confirmed by the Taiwanese giant, so they may not be a 100% accurate.

https://www.techpowerup.com/272267/alleg...ers-appear

From 90 nm to 20 nm, the price of the wafer didn't increase as much, however, starting from 16/12 nm node(s), TSMC has seen costs per wafer, and other costs increase exponentially. For example, just compare the 10 nm wafer price of $5992 with the price of a 5 nm wafer which costs an amazing $16988. This is more than a 180% price increase in just three years, however, the cost per transistor is down as you get around 229% higher density in that period, making TSMC actually in line with Moore's Law. That is comparing Transistor density (MTr / mm²) of 52.51 million transistors for the 10 nm node and 173 million transistors per mm² of the 5 nm node.

[SteelCrysis]

https://www.extremetech.com/computing/31...capability

TSMC won’t have to worry about finding additional customers for its 5nm line any time soon. If reports are true, Apple bought the entire production capacity for the iPhone, iPad, and other refreshed devices it has recently launched or will launch in the coming weeks. Apple hasn’t refreshed the iPhone yet this year, but it’s expected to do so in October, and the company has had a lock on TSMC’s 5nm production for months.

https://www.techpowerup.com/272303/tsmc-...t-customer

TSMC has hit a jackpot with its newer nodes like 7 nm and now 5 nm, as the company is working with quite good yields. To boast, TSMC has seen all of its capacity of 7 nm being fully booked by customers like AMD, Apple, and NVIDIA. However, it seems like the company's next-generation 5 nm node is also getting high demand. According to the latest report from DigiTimes, TSMC's N5 5 nm node is fully booked to the end of 2020. And the biggest reason for that is the biggest company in the world - Apple. Since Apple plans to launch the next-generation iPhone, iPad, and Arm-based MacBook, the company has reportedly booked most of the 5 nm capacity for 2020, meaning that there are lots of chips that Apple will consume. TSMC can't be dependent only on one company like Apple, so the smaller portion of capacity went to other customers as well.

[SteelCrysis]

https://www.techpowerup.com/277229/trend...rting-2021

According to a market analysis from TrendForce, Intel's manufacturing efforts with TSMC will go way beyond a potential TSMC technology licensing for that company's manufacturing technology to be employed in Intel's own fabs. The market research firm says that Intel will instead procure wafers directly from TSMC, starting on 2H2021, in the order of 20-25% of total production for some of its non-CPU products. But the manufacturing deal is said to go beyond that, with TSMC picking up orders for Intel's Core i3 CPUs in the company's 5 nm manufacturing node - one that Intel will take years to scale down to on its own manufacturing capabilities.

According to TrendForce, that effort will scale upwards with TSMC manufacturing certain allotments of Intel's midrange and high-end CPUs using the semiconductor manufacturer's 3 nm technology in 2022. TrendForce believes that increased outsourcing of Intel's product lines will allow the company to not only continue its existence as a major IDM, but also maintain and prioritize in-house production lines for chips with high margins, while more effectively spending CAPEX on advanced R&D due to savings on fabrication technology scaling - fewer in-house chips means lower needs for investment in capacity increases, which would allow the company to sink the savings into further R&D. The move would also allow Intel to close the gap with rival AMD's manufacturing advantages in a more critical, timely manner.

[SteelCrysis]

https://www.extremetech.com/computing/31...s-5nm-node

There’s a rumor that Intel is planning to outsource Core i3 production to TSMC’s 5nm node. This would be the first time the chip giant has built one of its Core CPUs on a different company’s process node. Intel originally planned to announce its future foundry plans on January 21, but this may have changed with the recent appointment of Pat Gelsinger as CEO.

TrendForce reports that Intel is specifically moving the Core i3 to TSMC 5nm for 2H 2021, with a plan to shift mid-range and high-end products to TSMC’s 3nm node in the second half of 2022. TSMC recently reported that its 3nm development is “on track with good progress.” Unlike Samsung, which is adopting gate-all-around (GAA) FETs, TSMC will continue to use FinFET at the 3nm node, albeit FinFET with “innovative features” intended to improve overall performance.
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The TrendForce rumor makes sense as far as the idea that Intel would move a single product before launching an entire line-up, but it’s not a guarantee. It’s not an exaggeration to call this a pivotal moment in Intel’s history. No matter what path the company takes, it’ll be making decisions that shape its business for at least the next decade.