12-29-2020, 08:04 AM
https://www.tomshardware.com/news/nvidia...-gpu-rumor
https://www.techpowerup.com/276455/nvidi...32-shaders
Quote:Nvidia's Ampere architecture has just fairly recently arrived to consumers (at least for those who've managed to find it in stock), but that hasn't stopped leakers from figuring out what's next on Nvidia's agenda, at least for its future gaming architectures. 3dCenter.org Tweeted on new rumored specifications for Nvidia's future "Lovelace" AD102 chip, which might include 144 SMs and 18432 CUDA cores with around 66 TFlops of computing performance.
Beware, this is entirely based on rumors, and with how little we know about Nvidia's next GPU architectures, there's a huge chance most of this info is wrong. But, at least this post can give us some clues as to where Nvidia is headed.
One part of this rumor that does make sense is the codename "Lovelace"; Jensen a few years back at CES of 2018 was wearing a T-shirt with several names of popular mathematicians all through history. And with Nvidia's love for codenaming architectures with names of mathematicians, many believe Jensen was leaking the names of future architectures on his T-Shirt. One of those names was Lovelace.
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If you were wondering about Nvidia's other rumored architecture, Hopper, it seems right now that both Hopper and Lovelace are in the works. What makes Hopper interesting is its multi-die design, which would be a first for Nvidia. What we could see is Lovelace being Nvidia's gaming architecture, as one die decreases latency, then we could see Hopper as being a data center exclusive.
https://www.techpowerup.com/276455/nvidi...32-shaders
Quote:The rumor mill has begun grinding with details about NVIDIA's next-gen graphics processors based on the "Lovelace" architecture, with Kopite7kimi (a reliable source with NVIDIA leaks) predicting a 71% increase in shader units for the "AD102" GPU that succeeds the "GA102," with 12 GPCs holding 6 TPCs (12 SMs), each. 3DCenter.org extrapolates on this to predict a CUDA core count of 18.432 spread across 144 streaming multiprocessors, which at a theoretical 1.80 GHz core clock could put out an FP32 compute throughput of around 66 TFLOP/s.
The timing of this leak is interesting, as it's only 3 months into the market cycle of "Ampere." NVIDIA appears unsettled with AMD RDNA2 being competitive with "Ampere" at the enthusiast segment, and is probably bringing in its successor, "Lovelace" (after Ada Lovelace), out sooner than expected. Its previous generation "Turing" architecture saw market presence for close to two years. "Lovelace" could leverage the 5 nm silicon fabrication process and its significantly higher transistor density, to step up performance.

