10-06-2020, 07:53 AM
https://www.tomshardware.com/news/amds-i...-bandwidth
https://www.techpowerup.com/272946/amd-b...ures-536mm
Quote:AMD (via @momomo_us) has trademarked the term "AMD Infinity Cache." The filing, which is on the Justia Trademarks website, applies to both the chipmaker's processor and graphics cards. In fact, the description of the trademark is so broad that it encompasses just about every type of silicon that AMD manufactures.
But the common consensus is that the trademark correlates with AMD's pending Big Navi launch. Memory bandwidth, among other aspects, is one of the major talking points about Nvidia's Ampere. The GeForce RTX 3090 flaunts an impressive memory bandwidth up to 936.2 GBps. The GeForce RTX 3080 and GeForce RTX 3070 aren't too shabby either, with theoretical values that peak to 760.3 GBps and 448 GBps, respectively.
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Other than the folks at AMD, we doubt anyone has any idea of what the Infinity Cache is truly all about. It might be a new feature, or it could just be a fancy term for an existing concept. For example, AMD branded the L3 cache on its Zen 2 processors as GameCache. It sounds great for marketing, but at the end of the day, it's still just the L3 cache that we've all come to know from most modern CPUs.
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It remains a mystery whether the Infinity Cache actually refers to the L2 cache or a new L3 cache, or something else entirely. Graphics cards commonly come with L1 and L2 caches because the bigger caches are slower and induce higher latency.
There's a possibility that the Infinity Cache may be related to a patent that AMD filed last year on Adaptive Cache Reconfiguration Via Clustering. Subsequently, the authors published a paper on the topic. It talks about the possibility of sharing the L1 caches between GPU cores.
Traditionally, GPU cores have their own individual L1 cache, while the L2 cache is shared among all the cores. The suggested model proposes that each GPU is allowed to access the other's L1 cache. The objective is to optimize the caches' use by eliminating the replicated data in each slice of the cache. The results are pretty amazing. Across a suite of 28 GPGPU applications, the new model improved performance by 22% (up to 52%) and energy efficiency by 49%.
https://www.techpowerup.com/272946/amd-b...ures-536mm
Quote:Coreteks, in a video presentation on Sunday, released what is possibly the very first picture of the AMD "Big Navi" GPU silicon, which could power the company's next-generation Radeon RX 6000 series flagship graphics card. The grainy, blurry-cam picture reveals a mostly square package with a large, rectangular die at its center, which Coreteks estimates to be 536 mm² in die-area, with 29 mm x 18.5 mm (LxW) dimensions. The channel used an unusual method for measuring the die size. The chip is rumored to feature around 80 compute units based on the RDNA2 graphics architecture, which includes fixed-function hardware for real-time raytracing, as RDNA2 is designed to meet DirectX 12 Ultimate logo requirements. We'll know more about the chip in the run up to its October 28 unveiling.

