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64-Layer 3D NAND Is Here
Quote:In a joint announcement, Western Digital and its subsidiary SanDisk outed their first SSDs with 64-layer NAND technology. The new consumer products utilize BiCS FLASH, the highly anticipated 3D stacking technology that’s used to increase storage density and increase endurance.

The WD Blue 3D and SanDisk Ultra 3D SSD families come to market with identical speeds and feeds. Capacities range from 250GB to 2TB with stops along the way at 500GB and 1TB. WD told us to expect up to 560 MBps sequential read and 530 MBps sequential write speeds from the 64-layer 3-bit per cell 3D NAND used in the drives. We don’t expect a significant performance loss from the smaller capacity models.
Western Digital didn’t give us price points for all capacity sizes, but we know all three 250GB products carry a $100 MSRP with a three-year warranty. Expect products to ship in Q3 2017.
Quote:The 64-layer 3D NAND about to land from Micron and Toshiba certainly sounds impressive, but it pales in comparison to what Sk Hynix is working on for future release. The company is developing 96-layer and 128-layer 3D NAND flash. The new flash won't be available for a few years, but that makes it no less exciting. We have yet to see 72-layer 3D from Sk Hynix in our lab, but it will begin shipping soon in the PC401 using 256Gbit TLC die, according to the UNH-IOL list of tested products.
SSDs use several NAND die per product, and the act of reading and writing to several at the same time give us the performance we associate with SSDs. It takes several die to saturate PCIe 3.0 x4 in terms of throughput. The new large capacity die will use the same number of parts to reach a specific performance number, but the capacity of the drive will increase. In short, a 512GB SSD today will turn into a 2TB SSD with 1Tbit die. The cost of the two products should be fairly consistent, too. It's important to understand that we're talking about next-next generation technology here--that's two next generations out from now.

The part that makes this little nugget of information interesting also comes from some backroom conversations we had over the last few days. At Computex 2018, QLC with 4-bit per cell will enter into the NAND discussion from at least one NAND fab. QLC will increase die density by adding an extra bit. Single-level cell NAND had to look for only two power states, but that moved to eight with TLC. QLC will increase the number to sixteen states, and it will require significantly advanced error correction to stabilize the flash that's expected to have around 100 P/E cycles. It looks like Sk Hynix will not follow suit with QLC that early.

We don't want to make it sound as if Micron and Toshiba are not working on 128-layer NAND die. We just haven't found anyone willing to talk about what comes after 64 layers for TLC NAND from those companies.

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