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TSMC 3nm Thread
#1
https://www.techpowerup.com/260464/tsmc-...nstruction
Quote:According to the sources over at DigiTimes, TSMC has acquired as much as 30 hectares of land in the Southern Taiwan Science Park to begin the construction of its fabs that are supposed to start high-volume manufacturing 3 nm node in 2023. Construction of 3 nm manufacturing facilities are set to begin in 2020 when TSMC will lay the groundwork for the new fab. The 3 nm semiconductor node is expected to be TSMC's third attempt at EUV lithography, right after the 7 nm+, and 5 nm nodes which are also based on EUV technology.
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#2
https://www.tomshardware.com/news/tsmc-t...ent-center
Quote:TSMC plans to add 8000 jobs for a new R&D center that is expected to be completed in late 2020. It will be geared towards research and development for 3nm and beyond process technology.

That was announced on Thursday by Mark Liu, executive chairman of TSMC, who said TSMC will hire an additional 8000 employees for the center. The new R&D center will be located in northern Taiwan. Construction is scheduled to start early next year and is anticipated to be completed by the end of the year. According to Taiwan News, an employee said it would be dedicated to 3nm development.
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#3
https://www.techpowerup.com/265991/tsmc-...millimeter
Quote:Imagine being able to shrink a Pentium 4 processor die to the size of a pin-head (if you can figure out how to place 478 bumps on it). TSMC revealed that its future 3 nanometer silicon fabrication node has a development target of 250 million transistors per mm². Called N3, the next-generation silicon fabrication node succeeds TSMC's N5 family of 5 nm-class nodes (that's N5 and any possible refinements).

TSMC CEO CC Wei confirmed that development of the 3 nm node is on-track, with risk production scheduled for 2021 and volume production commencing in the second half of 2022. Perhaps the most startling revelation is that TSMC has decided to stick with FinFETs for N3 owing to the maturity of the technology. Experts are of the opinion that sub-5 nm nodes will require major innovations with materials and structures. TSMC claims that N3 will provide a 10-15% speed improvement at iso-power or 25-30% power reduction at iso-speed, compared to N5.
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