{"id":11298,"date":"2009-09-24T20:03:22","date_gmt":"2009-09-24T20:03:22","guid":{"rendered":"http:\/\/alienbabeltech.com\/main\/?p=11298"},"modified":"2009-09-24T20:03:22","modified_gmt":"2009-09-24T20:03:22","slug":"intel-displays-22nm-cpu-with-8-cores","status":"publish","type":"post","link":"https:\/\/alienbabeltech.com\/main\/intel-displays-22nm-cpu-with-8-cores\/","title":{"rendered":"Intel Displays 22nm CPU With 8 Cores"},"content":{"rendered":"<p>In the context of the currently sitting in San Francisco Intel Developer Forum, Intel has held a first wafer in 22 nanometer chips in the camera. This is the manufacturing process, Intel wants to address after 32 nanometers.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" title=\"\" style=\"border-top-width: 0px; display: block; border-left-width: 0px; float: none; border-bottom-width: 0px; margin-left: auto; margin-right: auto; border-right-width: 0px\" alt=\"\" src=\"https:\/\/i1.wp.com\/alienbabeltech.com\/main\/wp-content\/uploads\/2009\/09\/ivy_bridge_1-jpg.jpg?resize=500%2C399\" border=\"0\" data-recalc-dims=\"1\" \/> <\/p>\n<p>As a detailed die-shot of the processor further suggests, is among the most chips at the eight Ivy Kerner Bridge. This is after running the Intel roadmap refresh of the 2010 Sandy Bridge core, which will not be marketable before 2011.<\/p>\n<p><a href=\"https:\/\/i0.wp.com\/alienbabeltech.com\/main\/wp-content\/uploads\/2009\/09\/ivy_bridge_2-jpg.jpg\"><img loading=\"lazy\" decoding=\"async\" title=\"\" style=\"border-top-width: 0px; display: block; border-left-width: 0px; float: none; border-bottom-width: 0px; margin-left: auto; margin-right: auto; border-right-width: 0px\" alt=\"\" src=\"https:\/\/i0.wp.com\/alienbabeltech.com\/main\/wp-content\/uploads\/2009\/09\/ivy_bridge_2_thumb-jpg.jpg?resize=450%2C311\" border=\"0\" data-recalc-dims=\"1\" \/><\/a> <\/p>\n<p>Intel says the illustrated processor 2.9 billion transistors &#8211; the ongoing four-Kerner Bloomfield has 0.7 billion &#8211; and mentioned that it is still in a test pattern with SRAM cells. The L2 cache per core should be large 256 to 512 KiB, the L3 cache is estimated at 16 MiB.<\/p>\n<p>&#160;<\/p>\n<h6>Source: <a href=\"http:\/\/www.translate.google.com\/translate?js=y&amp;prev=_t&amp;hl=en&amp;ie=UTF-8&amp;u=http:\/\/www.hardware-infos.com\/news.php%3Fnews%3D3214&amp;sl=auto&amp;tl=en&amp;history_state0=\" onclick=\"_gaq.push(['_trackEvent', 'outbound-article', 'http:\/\/www.translate.google.com\/translate?js=y&amp;prev=_t&amp;hl=en&amp;ie=UTF-8&amp;u=http:\/\/www.hardware-infos.com\/news.php%3Fnews%3D3214&amp;sl=auto&amp;tl=en&amp;history_state0=', 'Hardware-Infos']);\" target=\"_blank\">Hardware-Infos<\/a><\/h6>\n<p>&#160;<\/p>\n<p>&#160;<\/p>\n<p><strong>Leon Hyman<\/strong>     <br \/><strong><em>Senior Editor<\/em><\/strong><\/p>\n<p><strong><em><\/em><\/strong><\/p>\n<p><strong><em><\/em><\/strong><\/p>\n<blockquote>\n<p>Please join us in our <a href=\"http:\/\/alienbabeltech.com\/abt\/index.php\" target=\"_blank\">Forums<\/a><\/p>\n<p>Become a Fan on <a href=\"http:\/\/www.facebook.com\/pages\/AlienBabelTech\/123268467142\" onclick=\"_gaq.push(['_trackEvent', 'outbound-article', 'http:\/\/www.facebook.com\/pages\/AlienBabelTech\/123268467142', 'Facebook']);\" target=\"_blank\">Facebook<\/a><\/p>\n<p>Follow us on <a href=\"http:\/\/twitter.com\/alienbabeltech\" onclick=\"_gaq.push(['_trackEvent', 'outbound-article', 'http:\/\/twitter.com\/alienbabeltech', 'Twitter']);\" target=\"_blank\">Twitter<\/a><\/p>\n<p>For the latest updates from ABT, please <a href=\"http:\/\/alienbabeltech.com\/main\/?feed=rss2\" target=\"_blank\">join our RSS News Feed<\/a><\/p>\n<p>Join our Distributed Computing teams<\/p>\n<ul>\n<li>Folding@Home &#8211; Team AlienBabelTech &#8211; 164304 <\/li>\n<li>SETI@Home &#8211; Team AlienBabelTech &#8211; 138705 <\/li>\n<li><a href=\"http:\/\/www.worldcommunitygrid.org\/reg\/viewRegister.do?teamID=3P39R3SRV1\" onclick=\"_gaq.push(['_trackEvent', 'outbound-article', 'http:\/\/www.worldcommunitygrid.org\/reg\/viewRegister.do?teamID=3P39R3SRV1', 'World Community Grid &#8211; Team AlienBabelTech']);\" target=\"_blank\">World Community Grid &#8211; Team AlienBabelTech<\/a> <\/li>\n<\/ul>\n<\/blockquote>\n","protected":false},"excerpt":{"rendered":"<p>In the context of the currently sitting in San Francisco Intel Developer Forum, Intel has held a first wafer in 22 nanometer chips in the camera. This is the manufacturing process, Intel wants to&#46;&#46;&#46;<\/p>\n","protected":false},"author":4,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[6,7],"tags":[2284,2283,842,34,1445],"class_list":["post-11298","post","type-post","status-publish","format-standard","hentry","category-news","category-technology","tag-22nm","tag-8-cores","tag-cpu","tag-intel","tag-wafer"],"_links":{"self":[{"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/posts\/11298","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/users\/4"}],"replies":[{"embeddable":true,"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/comments?post=11298"}],"version-history":[{"count":0,"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/posts\/11298\/revisions"}],"wp:attachment":[{"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/media?parent=11298"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/categories?post=11298"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/alienbabeltech.com\/main\/wp-json\/wp\/v2\/tags?post=11298"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}