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96-Layer 3D NAND And QLC NAND
#1
http://www.anandtech.com/show/11585/west...layer-nand
Quote:Western Digital on Tuesday formally announced its fourth-generation 3D NAND memory, developed as part of the Western Digital/Toshiba joint venture. The fourth-generation BiCS NAND flash chips from Western Digital feature 96 layers and will include several capacity points and will use TLC and QLC architectures. The company expects to start volume production of BiCS4 chips in 2018.

https://www.techpowerup.com/234729/toshi...ash-memory
Quote:Toshiba America Electronic Components, Inc. (TAEC) today announced the latest generation of its BiCS FLASH three-dimensional (3D) flash memory. The newest BiCS FLASH device features 4-bit-per-cell, quadruple-level cell (QLC) technology and is the first 3D flash memory device to do so. Toshiba's QLC technology enables larger (768 gigabit) die capacity than the company's third-generation 512Gb 3-bit-per-cell, triple-level cell (TLC), and pushes the boundaries of flash memory technology.
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Samples of Toshiba's groundbreaking QLC device began shipping earlier in June to SSD and SSD controller vendors for evaluation and development purposes. Additionally, samples will be showcased at the 2017 Flash Memory Summit, taking place from August 7-10 in Santa Clara, California.
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#2
http://www.anandtech.com/show/11590/tosh...p-e-cycles
Quote:Besides intention to produce 768 Gb 3D QLC NAND flash for the aforementioned devices, the most interesting part of Toshiba’s announcement is endurance specification for the upcoming components. According to the company, its 3D QLC NAND is targeted for ~1000 program/erase cycles, which is close to TLC NAND flash. This is considerably higher than the amount of P/E cycles (100 – 150) expected for QLC by the industry over the years. At first thought, it comes across a typo - didn't they mean 100?. But the email we received was quite clear:

- What’s the number of P/E cycles supported by Toshiba’s QLC NAND?
- QLC P/E is targeted for 1K cycles.


It is unclear how Toshiba managed to increase the endurance of its 3D QLC NAND by an order of magnitude versus initially predicted. What we do know is that signal processing is more challenging with QLC than it is with TLC, as each cell needs to accurately determine sixteen different voltage profiles (up from 2 in SLC, 4 in MLC, and 8 in TLC).
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#3
WD has achieved 3D QLC NAND: https://www.techpowerup.com/235447/weste...on-3d-nand
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#4
Samsung is working on a 128 TB QLC SSD, and other good stuff: http://www.tomshardware.com/news/samsung...35180.html
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#5
http://www.tomshardware.com/news/phison-...36071.html
Also read the rest about Phison's E12 controller, it's promising.
Quote:We're starting to hear about 96-layer BiCS FLASH with an expected date of the end of 2018. There are also whispers of QLC coming from Toshiba at that time. The E12 will overlap with Toshiba's next generation memory. 96-layer QLC is a story for another day, but mid-year or at Flash Memory Summit looks to be a good time for companies to preview products based on the technology.
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#6
http://www.tomshardware.com/news/intel-7...36335.html
Quote:Last but not least is the most interesting leak: In the middle of the chart is the Intel SSD 660p with 4-bit per cell (QLC) flash. The SSD 660p listing shows three capacities (512GB, 1TB and 2TB). The performance is much higher than we expected to see from QLC at right out of the gate. The leak says the 660p will achieve up to 1,800 MB/s sequential read and 1,100 sequential write speeds. The random performance clocks in at 150,000 IOPS for both reads and writes.

QLC was a hot topic at CES last week, but only behind closed doors. No one wanted to go on the record, but we know IMFT (Intel Micron Flash Technology) has it ready for the most part. Companies are excited about the cost-cutting technology but need controllers to pair with it. One source told us to expect 512GB QLC SSDs for around $100.

http://www.tomshardware.com/news/marvell...36311.html
Quote:The controller will be part of Marvell's next generation controller product family addressing consumer, cloud data center, and enterprise SSDs. In the consumer space, manufacturers can built add-in card or M.2 form factors. The new product family will have controllers that can run in an enterprise-focused dual port PCIe 3.0 x2 configuration, most likely in a U.2 form factor with two lanes each going to separate nodes (computers in the same server chassis).

We first heard about the controller while talking with various companies about QLC NAND, four bits per cell. Every controller manufacturer is feverishly working to get hardware ready for the low endurance NAND that requires increased error correction technology. Marvell’s NANDEdge ECC technology is expected to be a key enabler of future QLC SSD solutions.
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#7
An interesting note on the future of 3D NAND: https://techreport.com/review/33135/sams...e-reviewed
Quote:Samsung's stacks of flash have tripled in height since then—the company recently announced its forthcoming fifth-generation, 96-layer V-NAND. That flash may mark the end of line for Samsung's layer jenga. The company has hinted it will likely be seeking future gains through means other than adding more layers.
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#8
Micron's QLC NAND SSDs start shipping to servers this year: https://www.techpowerup.com/241544/micro...nvironment
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#9
Maybe Samsung should reconsider their decision to not push 3D NAND beyond 96 layers: https://www.techpowerup.com/244224/inter...rs-by-2021
Quote:Applied Material's Sean Kang, speaking at Japan's International Memory Workshop (IMW), said that he expects future 3D NAND technologies to achieve 140 layers (up from today's leading 64-layer tech) by 2021. Increased numbers of layers will allow for increased die densities whilst keeping the same PCB real-estate and implementation area; at the same time, which is something the industry is craving for as data-sets only continue to increase in size. Before 2021 and its 140-layer NAND comes (which will require new fabrication materials), 90-layer solutions are expected to be launched this year, with a 20% decrease in layer height, down from its current 60 nm to 55 nm, which will allow for relatively stable stack heights, even as the number of layers increases significantly (by around 40% compared to 64-layer tech). Cheaper, more dense NAND tech - what isn't there to like?
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#10
https://www.extremetech.com/computing/26...t-qlc-nand
Quote:One interesting point Micron made to me when we spoke was that the endurance needs of SSDs are actually decreasing, in many areas, rather than increasing. At first glance, this might seem counterintuitive. After all, the amount of data we collectively create each year has been growing for years. As it turns out, however, more advanced operating systems that return more data on how much data is actually written to drives per day in enterprise deployments has shown that the number of writes is lower, in some cases, than was previously thought.

Meanwhile, rapid growth in SSD capacities has meant that drives, generally speaking, are now much larger than they once were. This naturally decreases the number of drive writes per day that are practically going to be performed. We even referenced this idea earlier this year, when we noted that Nimbus’ 100TB SSD is so huge, you literally can’t perform one drive write per day if you assume that the SSD maintains its maximum rated transfer speed 24 hours per day.

When you put these trends together, you’ve got a potentially large market for SSDs in industries that have historically still been using HDDs, or might only be using SSDs for caching. The Ion 5210 QLC isn’t expected to replace TLC drives, but to serve as an adjunct to them, offering better than hard drive performance; significantly higher drive capacities, thanks to the 1.33x improvement in data stored per-cell; and a better overall price tag compared with MLC or TLC drives over the long term. Micron isn’t sharing more details than that at the moment, but the company has stated that it expects to give more information later this year.
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#11
https://www.techpowerup.com/244644/weste...s4-3d-nand
Quote:Even as researchers expect 3D NAND flash to achieve the 140-layer level by 2021, technology and manufacturers still have to take all the intermediate steps before we're actually there. In that sense, Western Digital has just announced that they're well on their way in producing 96-layer 3D NAND and distributing it to customers. For now, the memory will be used for inexpensive storage solutions, but the idea is to eventually ramp um production for other, higher-performance products.
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#12
https://www.techpowerup.com/245365/micro...in-2h-2018
Quote:In their recent earnings call, Micron commented that they have 96-layer 3D NAND technology on track for volume shipments in the second half of 2018. Most of today's SSDs typically use 32-layer technology, with 64-layer flash chips used in some recent releases like the Crucial MX500. 96-layer is the third generation of 3D NAND and increases storage capacity per chip even further which allows smaller and more energy efficient mobile devices to be built. Of course it will be cheaper too, compared to current-generation 64 layer NAND, which should bring SSD pricing down even more, and of course generally help pricing of consumer products which use flash memory.
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#13
https://techreport.com/news/33886/samsun...-90-layers
Quote:Samsung has delivered another salvo in the race to ever-increasing NAND flash density and performance. The company has begun mass production of its fifth-generation V-NAND memory with "over 90" (likely 96) layers per die.
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